As part of the educational curriculum of the ETH Zurich we actively support student semester and master theses that result in ASICs.

VLSI Lectures

The most common way to design your own chip is to enrol in the VLSI lecture series. As part of this lecture series students are offered the opportunity to design their own ASICs in parallel to the VLSI II lecture. In the following semester the chips come back from manufacturing and the students can test their own chips during the exercises of the VLSI III lecture. The timeline for these lectures can be seen here.

IC technologies

We maintain a series of IC technologies which can be used for student projects. Currently our main technology is UMC 180nm, however depending on the project and the availability we may also use UMC130nm or UMC 90nm as well.

180nm Mini@sic Bonding Diagrams

At the moment we have three different available bonding diagrams for the semester theses. 

Design Proposal

Before you can start with your own ASIC, you will have to submit a design proposal. This page will help you with the design proposal. We have an additional page that has answers to some frequently asked questions.

Design Review

Prior to actually sending your own ASIC we will conduct a design review. You will present your design to a small group that consists of members of the design center as well as your advisors. Details of what is expected from you can be found under this link.