Student Projects

As part of the educational curriculum of the ETH Zurich we actively support student semester and master theses that result in ASICs.

VLSI Lectures

    The most common way to design your own chip is to enrol in the VLSI lecture series. As part of this lecture series students are offered the opportunity to design their own ASICs in parallel to the VLSI II lecture. In the following semester the chips come back from manufacturing and the students can test their own chips during the exercises of the VLSI III lecture. The timeline for these lectures can be seen here.

IC technologies

    We maintain a series of IC technologies which can be used for student projects. Currently our main technology is UMC 65nm, Please use the internal eda.ee.ethz.ch website for up to date information.

65nm Mini@sic Bonding Diagrams

    At the moment we have three different available bonding diagrams for the semester theses. Please refer to the internal eda.ee.ethz.ch webpage for up to details.

Design Proposal

    Before you can start with your own ASIC, you will have to submit a design proposal. The internal eda.ee.ethz.ch website has up to date information on the design proposal.

Design Review

    Prior to actually sending your own ASIC we will conduct a design review. You will present your design to a small group that consists of members of the design center as well as your advisors. Details of what is expected from you can be found in the internal eda.ee.ethz.ch website.

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